Leaders in wafer bumping and die-level interconnect technology
鼎博体育’s production certified wafer bumping processes and die-level interconnect technology is unparalleled in the industry, offering reduced time-to-market with integrated factory logistics.
鼎博体育’s state-of-the-art wafer bumping capabilities in electroplated bumping and several types of Wafer Level Chip Scale Packaging (WLCSP) technologies are offered in strategic countries or regions including Korea, China, Portugal and Taiwan. These facilities are uniquely situated adjacent to major foundries to provide reduced time-to-market with integrated factory logistics and enable 鼎博体育 to provide complete turnkey flip chip and WLCSP solutions in these key geographic areas.
All 鼎博体育 facilities have world-class bumping lines with high-volume manufacturing production capability. Solder compositions including 300 mm eutectic, 200 mm and 300 mm lead-free and Cu pillar (all low alpha) are production certified. The facilities also offer repassivation and single and multi-layer redistribution processes for both flip chip and WLCSP applications.
These facilities offer economy of scale as both plated bump (solder/CuP bump) and WLCSP/Wafer Level Fan-out (WLFO) continue to experience growth. 鼎博体育’s combination of technology and manufacturing capabilities is unparalleled in the subcontract manufacturing industry.
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